A High-Throughput Low-Power Soft Bit-Flipping LDPC Decoder in 28 nm FD-SOI.
Kevin CushonPer Larsson-EdeforsPeter A. AndreksonPublished in: ESSCIRC (2018)
Keyphrases
- high throughput
- low density parity check
- decoding algorithm
- low power
- ldpc codes
- silicon on insulator
- cmos technology
- nm technology
- microarray
- power consumption
- high speed
- low cost
- data acquisition
- noise model
- low voltage
- vlsi architecture
- error correction
- distributed source coding
- non binary
- turbo codes
- digital signal processing
- low complexity
- power dissipation
- distributed video coding
- belief propagation
- real time
- transform domain
- low power consumption
- mass spectrometry