Minimization of average execution time based on speculative FPGA configuration prefetch.

Adrian Alin Lifa Petru Eles Zebo Peng

Published in: ReConFig (2012)

Keyphrases

hardware implementation
real time
execution model
high speed
prefetching
real time image processing
website
objective function
cost function
low cost
plan execution
hardware design
single chip
power reduction
concurrent execution