General transistor-level methodology on VLSI low-power design.
Zuying LuoPublished in: ACM Great Lakes Symposium on VLSI (2006)
Keyphrases
- low power
- single chip
- high speed
- power dissipation
- vlsi architecture
- gate array
- power consumption
- low power consumption
- low cost
- logic circuits
- mixed signal
- vlsi circuits
- cmos technology
- high power
- design methodology
- digital signal processing
- power reduction
- wireless transmission
- image sensor
- nm technology
- ultra low power
- low complexity