A 1V 136.6dB-DR 4kHz-BW $\Delta\Sigma$ Current-to-Digital Converter with a Truncation-Noise-Shaped Baseline-Servo-Loop in 0.18\mu\mathrm{m}$ CMOS.
Taeryoung SeolSehwan LeeGeunha KimSamhwan KimEuiseong KimSeungyeob BaikJaeha KungJi-Woong ChoiArup K. GeorgeJunghyup LeePublished in: ISSCC (2023)