SAT-based Unbounded Model Checking of Timed Automata.
Wojciech PenczekMaciej SzreterPublished in: ACSD (2007)
Keyphrases
- timed automata
- model checking
- bounded model checking
- formal verification
- temporal logic
- reachability analysis
- planning domains
- model checker
- computation tree logic
- automated verification
- temporal properties
- formal specification
- symbolic model checking
- linear temporal logic
- verification method
- transition systems
- pspace complete
- ai planning
- epistemic logic
- formal methods
- artificial intelligence
- answer set programming
- knowledge base
- alternating time temporal logic
- concurrent systems
- asynchronous circuits