A Fast Scheduling Algorithm for Low Power Design.
Ashok KumarMagdy A. BayoumiPublished in: J. Circuits Syst. Comput. (2005)
Keyphrases
- low power
- scheduling algorithm
- power consumption
- single chip
- high speed
- low power consumption
- low cost
- logic circuits
- vlsi architecture
- digital signal processing
- response time
- power dissipation
- cmos technology
- design process
- high power
- scheduling strategy
- gate array
- ultra low power
- embedded systems
- real time
- mixed signal
- delay insensitive
- wireless transmission
- vlsi circuits
- signal processor
- nm technology