Zero-Efficient Buffer Design for Reliable Network-on-Chip in Tiled Chip-Multi-Processor.

Jun Wang Hongbo Zeng Kun Huang Ge Zhang Yan Tang

Published in: DATE (2008)

Keyphrases

network on chip
multi processor
power dissipation
routing algorithm
program execution
single processor
single chip
shared memory
multi core processors
network simulator
data transfer
quality of service
low cost
search algorithm
low power
real time
multistage
signal processing
markov random field