A New Low-Power and High Speed Viterbi Decoder Architecture.
Chang-Jin ChoiSang-Hun YoonJong-Wha ChongShouyin LiuPublished in: ICUCT (2006)
Keyphrases
- low power
- high speed
- vlsi architecture
- cmos technology
- power consumption
- low cost
- real time
- single chip
- nm technology
- high power
- signal processor
- noisy channel
- hidden markov models
- mixed signal
- logic circuits
- wireless transmission
- vlsi circuits
- decoding algorithm
- digital signal processing
- frame rate
- low power consumption
- gate array
- low voltage
- power dissipation
- image processing