A low-power hybrid ADC architecture for high-speed medium-resolution applications.
Seyed Alireza ZahraiMarvin OnabajoPublished in: MWSCAS (2015)
Keyphrases
- low power
- high speed
- vlsi architecture
- single chip
- low cost
- power consumption
- cmos technology
- analog to digital converter
- mixed signal
- real time
- wireless transmission
- signal processor
- high power
- digital signal processing
- nm technology
- cmos image sensor
- vlsi circuits
- high resolution
- sigma delta
- low power consumption
- logic circuits
- data flow
- signal processing