Architecture and Implementation of a Vector/SIMD Multiply-Accumulate Unit.
Albert DanyshDimitri TanPublished in: IEEE Trans. Computers (2005)
Keyphrases
- single instruction multiple data
- layered architecture
- parallel implementation
- architectural design
- hardware implementation
- memory management
- feature vectors
- hardware architecture
- design considerations
- real time
- management system
- data flow
- software implementation
- massively parallel
- processing units
- design methodology
- hardware architectures
- processor array
- highly modular
- platform independent
- computing systems
- processing elements
- highly parallel
- parallel architecture
- modular architecture
- loose coupling
- industrial strength