Understanding the Impact of Inter-Thread Cache Interference on ILP in Modern SMT Processors.
Joshua L. KihmAlex SettleAndrew JaniszewskiDan ConnorsPublished in: J. Instr. Level Parallelism (2005)
Keyphrases
- embedded processors
- parallel algorithm
- main memory
- parallel processing
- memory subsystem
- data access
- inductive logic programming
- machine learning
- parallel processors
- prefetching
- memory hierarchy
- memory access
- multithreading
- statistical machine translation
- parallel computing
- multipath
- message passing
- database management systems
- natural language