A High-Performance Network-on-Chip Topology for Neuromorphic Architectures.
Nasrin AkbariMehdi ModarressiPublished in: CSE/EUC (2) (2017)
Keyphrases
- network on chip
- interconnection networks
- parallel computers
- fault tolerant
- routing algorithm
- parallel algorithm
- multistage
- message passing
- packet switched
- data transfer
- network simulator
- multi processor
- parallel implementation
- wireless sensor networks
- parallel computing
- shared memory
- distributed memory
- ad hoc networks
- parallel processing
- web services
- real time
- massively parallel
- power dissipation
- cmos technology
- shortest path
- cloud computing