A 200 μA Duty-Cycled PLL for Wireless Sensor Nodes in 65 nm CMOS.
Salvatore DragoDomine LeenaertsBram NautaFabio SebastianoKofi A. A. MakinwaLucien J. BreemsPublished in: IEEE J. Solid State Circuits (2010)
Keyphrases
- wireless sensor nodes
- data aggregation
- wireless sensor networks
- cmos technology
- silicon on insulator
- sensor networks
- metal oxide semiconductor
- nm technology
- sensor nodes
- wireless communication
- power consumption
- low power
- resource constrained
- low cost
- energy efficient
- energy consumption
- base station
- low voltage
- image sensor
- analog vlsi
- sensor data
- power supply
- high speed
- circuit design
- data collection
- computer simulation
- lightweight
- delay insensitive
- integrated circuit
- dynamic range
- routing algorithm
- random access memory
- real time
- ibm power processor
- parallel processing
- data streams