A new systolic array algorithm for a high throughput low cost VLSI implementation of DCT.

Doru-Florin Chiper M. N. S. Swamy M. Omair Ahmad

Published in: ICECS (2008)

Keyphrases

high throughput
vlsi implementation
low cost
standard deviation
hardware implementation
genome wide
computationally efficient
microarray
data acquisition
image processing
computational complexity
signal processing
image quality
parallel algorithm