A Low-Cost Triple-Channel 10-bit 250MHz DAC IP in 65nm CMOS Process.

Wen-Shen Chou Shu-Chieh Yang Fu-Lung Hsueh Heng-Chang Huang Chih-Ji Hsiao

Published in: ISCAS (2007)

Keyphrases

low cost
low power
nm technology
cmos technology
multi channel
power consumption
high speed
single chip
switched networks
real time
max csp
flip flops
digital signal processing
rfid tags
metal oxide semiconductor
highly efficient
power dissipation
ip address
power reduction
fpga device
embedded systems