Scalable and Power-Efficient Implementation of an Asynchronous Router with Buffer Sharing.

Charles Effiong Gilles Sassatelli Abdoulaye Gamatié

Published in: DSD (2017)

Keyphrases

efficient implementation
map reduce
active set
highly parallel
hardware implementation
information sharing
efficient processing
power consumption
end to end
single pass
flow control
buffer size
knowledge sharing
online discussion
parallel architectures