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Design a Gated PMOS Spillage Reduction Approach for CMOS SRAM Cell in 90nm Technology Node.
Deepak Mittal
Published in:
ICCCNT (2023)
Keyphrases
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nm technology
power consumption
low power
power dissipation
circuit design
high speed
power management
power reduction
case study
infrared
book presents
design considerations
power supply
cmos technology
random access memory