Density with a Peripheral Circuit Under Cell Array Architecture.

Jae-Woo Park Doogon Kim Sunghwa Ok Jaebeom Park Taeheui Kwon Hyunsoo Lee Sungmook Lim Sun-Young Jung Hyeong-Jin Choi Taikyu Kang Gwan Park Chul-Woo Yang Jeong-Gil Choi Gwihan Ko Jae-Hyeon Shin Ingon Yang Junghoon Nam Hyeokchan Sohn Seok-in Hong Yohan Jeong Sung-Wook Choi Changwoon Choi Hyun-Soo Shin Junyoun Lim Dongkyu Youn Sanghyuk Nam Juyeab Lee Myungkyu Ahn Hoseok Lee Seungpil Lee Jongmin Park Kichang Gwon Woopyo Jeong Jungdal Choi Jinkook Kim Kyowon Jin

Published in: ISSCC (2021)

Keyphrases

management system
real time
analog vlsi
high speed
design considerations
neural network
software architecture
network architecture
data flow
circuit design
architectural design
layered architecture
linear array
electronic circuits