A Scalable Pipelined Associative SIMD Array with Reconfigurable PE Interconnection Network for Embedded Applications.
Hong WangRobert A. WalkerPublished in: IASTED PDCS (2005)
Keyphrases
- interconnection networks
- parallel algorithm
- processor array
- parallel computers
- linear array
- smart camera
- fault tolerant
- processing elements
- multistage
- parallel architecture
- routing algorithm
- systolic array
- massively parallel
- shared memory
- parallel processing
- message passing
- embedded systems
- parallel implementation
- parallel architectures
- hardware implementation
- parallel computing
- hardware architecture
- low cost