A 3-V 230-MHz CMOS decimation subsampler.

Saska Lindfors Aarno Pärssinen Kari A. I. Halonen

Published in: IEEE Trans. Circuits Syst. II Express Briefs (2003)

Keyphrases

high speed
cmos technology
nm technology
low power
power consumption
analog vlsi
power supply
low voltage
low cost
parallel processing
real time
vlsi circuits
image sensor
circuit design
power dissipation
high frequency
delay insensitive
frequency domain analysis
flip flops
cmos image sensor
image processing
data sets