Design of low power two bit magnitude comparator using adiabatic logic.
Dinesh KumarManoj KumarPublished in: ISPACS (2016)
Keyphrases
- low power
- logic circuits
- low cost
- high speed
- single chip
- low power consumption
- power consumption
- vlsi architecture
- digital signal processing
- gate array
- wireless transmission
- cmos technology
- mixed signal
- power reduction
- embedded systems
- ultra low power
- vlsi circuits
- design process
- signal processor
- nm technology
- power dissipation
- high power
- delay insensitive
- vlsi implementation
- efficient implementation