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High-Level Synthesis for Packet-Processing Pipelines.

Xiangyu GaoDivya RaghunathanRuijie FangTao WangXiaotong ZhuAnirudh SivaramanSrinivas NarayanaAarti Gupta
Published in: CoRR (2022)
Keyphrases
  • high level synthesis
  • parallel architecture
  • data processing
  • real time
  • parallel processing
  • design space exploration