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Reconfigurable Distributed FPGA Cluster Design for Deep Learning Accelerators.
Hans Johnson
Tianyang Fang
Alejandro Perez-Vicente
Jafar Saniie
Published in:
CoRR (2023)
Keyphrases
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deep learning
single chip
field programmable gate array
low cost
clustering algorithm
embedded systems
reconfigurable hardware
systolic array
general purpose
maximum likelihood
segmentation algorithm
hardware implementation
power reduction
xilinx virtex