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A power-and-area efficient 10 × 10 Gb/s bootstrap transceiver in 40 nm CMOS for reference-less and lane-independent operation.

Joon-Yeong LeeKwangseok HanTaeho KimSangeun LeeJeong-Sup LeeTaehun YoonJinho ParkHyeon-Min Bae
Published in: CICC (2015)
Keyphrases
  • power consumption
  • high speed
  • power management
  • real time
  • detection algorithm
  • power generation
  • cmos technology
  • vlsi circuits