A new systolic array algorithm for memory-based VLSI array implementation of DCT.
Doru-Florin ChiperPublished in: ISCC (1997)
Keyphrases
- systolic array
- learning algorithm
- detection algorithm
- parallel architecture
- dynamic programming
- objective function
- computational complexity
- parallel implementation
- expectation maximization
- optimal solution
- hardware implementation
- np hard
- cost function
- search space
- simulated annealing
- similarity measure
- efficient implementation
- data flow
- preprocessing
- vlsi implementation
- databases