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Low power FSK transceiver using ADPLL with direct modulation and integrated SPDT for BLE application.

Dong-Soo LeeSeongJin OhSung-Jin KimCheolHo LeeChangHun SongJungyeon KimWooSeob KimHongJin KimSang-Sun YooSukkyun HongJeong-Woo LeeYoungGun PuKang-Yoon Lee
Published in: A-SSCC (2016)
Keyphrases
  • low power
  • ultra low power
  • high speed
  • power consumption
  • low cost
  • user friendly
  • wireless transmission
  • vlsi architecture
  • single chip
  • logic circuits
  • phase locked loop
  • sensor networks
  • low density parity check