Model-based mapping of reconfigurable image registration on FPGA platforms.
Mainak SenYashwanth HemarajWilliam PlishkerRaj ShekharShuvra S. BhattacharyyaPublished in: J. Real Time Image Process. (2008)
Keyphrases
- image registration
- field programmable gate array
- hardware implementation
- low cost
- systolic array
- digital signal
- mutual information
- coarse to fine
- multi modality
- reconfigurable architecture
- image pairs
- image matching
- image alignment
- affine transformation
- fpga implementation
- embedded systems
- real time image processing
- high speed
- real time
- power reduction
- multi modal
- image processing algorithms
- dedicated hardware
- hardware software co design
- processing elements
- hardware design
- log polar
- computing platform
- computing systems
- low power
- signal processing
- computer vision