High level synthesis of integrated heterogeneous pipelined processing elements for DSP applications.
Ali M. ShatnawiJehad GhanimM. Omair AhmadPublished in: Comput. Electr. Eng. (2004)
Keyphrases
- parallel architecture
- high level synthesis
- processing elements
- linear array
- hardware implementation
- parallel processing
- signal processing
- shared memory
- parallel implementation
- image processing algorithms
- massively parallel
- distributed memory
- pattern recognition
- image processing
- computer vision
- parallel computing
- efficient implementation
- higher order