A Design of Low-Power Dynamic Latch Comparator with Adaptive Power Control for12-bit Charge Sharing SAR ADCs.
Ali AzamVenkatesh KommanguntaJung-Hyun LeeKang-Yoon LeePublished in: ICEIC (2022)
Keyphrases
- low power
- power consumption
- power control
- single chip
- low power consumption
- high speed
- low cost
- power dissipation
- vlsi architecture
- power reduction
- logic circuits
- gate array
- digital signal processing
- nm technology
- mixed signal
- power management
- cmos technology
- ultra low power
- energy efficiency
- power saving
- analog to digital converter
- management system