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NoC-aware cache design for chip multiprocessors.

Ahmed AbousamraRami G. MelhemAlex K. Jones
Published in: PACT (2010)
Keyphrases
  • multithreading
  • high speed
  • single chip
  • network on chip
  • low cost
  • circuit design
  • user interface
  • design process
  • design methodology
  • evolvable hardware
  • low power consumption