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Design of Low Power Speech Processor-Based Cochlear Implants Using Modified FIR Filter with Variable Frequency Mapping.
P. F. Khaleelur Rahiman
V. S. Jayanthi
A. N. Jayanthi
Published in:
J. Circuits Syst. Comput. (2021)
Keyphrases
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low power
single chip
high speed
gate array
low cost
power consumption
fir filters
logic circuits
vlsi architecture
low power consumption
power dissipation
mixed signal
digital signal processing
filter design
vlsi implementation
frequency response
power reduction
ultra low power
cmos technology