A cache-aware motion estimation organization for a hardware-based H.264 encoder.
Deumji WooChae-Eun RheeHyuk-Jae LeePublished in: IEEE Trans. Consumer Electron. (2014)
Keyphrases
- motion estimation
- rate distortion
- video compression
- low complexity
- hardware and software
- video coding
- motion compensation
- memory hierarchy
- embedded processors
- motion field
- motion vectors
- rate constrained
- low cost
- motion compensated
- inter frame
- motion model
- video sequences
- multithreading
- video encoder
- computing power
- super resolution
- real time
- video codec
- spatial domain
- main memory
- block matching
- computer systems
- image sequences
- information systems
- motion estimation algorithm
- motion estimator
- reference frame
- processor core
- optical flow
- memory access
- memory subsystem
- computer vision
- block size
- prefetching
- video data
- single chip
- hardware implementation
- power reduction
- bit rate
- hardware architecture
- coding efficiency
- macroblock
- search range
- mode selection
- data access