Scalable, Pipelined, Cmos VLSI Content Addressable Memory Chips - Architecture And Implementation.
Kanad GhoseArun GuptaPublished in: VLSI Design (1992)
Keyphrases
- high speed
- content addressable memory
- parallel architecture
- chip design
- vlsi architecture
- vlsi implementation
- vlsi circuits
- low power
- data flow
- hardware architecture
- cmos technology
- hardware implementation
- analog vlsi
- design methodology
- design considerations
- processing elements
- low cost
- processor array
- parallel implementation
- instruction set
- single chip
- parallel processing
- fine grained
- analog to digital converter
- signal processing