A Low Power Hardware Implementation of Izhikevich Neuron using Stochastic Computing.
Aya A. IsmailZeinab A. ShaheenOsama RashadKhaled N. SalamaHassan MostafaPublished in: ICM (2018)
Keyphrases
- low power
- hardware implementation
- power consumption
- low cost
- high speed
- single chip
- software implementation
- low power consumption
- efficient implementation
- dedicated hardware
- signal processing
- field programmable gate array
- high power
- neural network
- digital signal processing
- fpga implementation
- wireless transmission
- vlsi circuits
- logic circuits
- vlsi architecture
- image processing algorithms
- power reduction
- real time
- mixed signal
- fpga technology
- general purpose
- pipelined architecture
- signal processor