On-chip delay measurement circuit.
Abhishek JainAndrea VeggettiDennis CrippaPierluigi RolandiPublished in: ETS (2012)
Keyphrases
- power dissipation
- phase locked loop
- high speed
- analog vlsi
- power consumption
- circuit design
- low power
- cmos technology
- evolvable hardware
- chip design
- low cost
- power reduction
- nm technology
- micron cmos
- digital signal processing
- real time
- finite state machines
- multipath
- analog circuits
- logic circuits
- design methodology
- signal processing
- neural network