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An ASIC Crypto Processor for 254-Bit Prime-Field Pairing Featuring Programmable Arithmetic Core Optimized for Quadratic Extension Field.

Hiromitsu AwanoTadayuki IchihashiMakoto Ikeda
Published in: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2019)
Keyphrases
  • single chip
  • data structure
  • computer science
  • pairwise
  • general purpose
  • input output
  • hardware implementation