An On-Chip Power-on Reset Circuit for Low Voltage Technology.

Takeo Yasuda Masaaki Yamamoto

Published in: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2002)

Keyphrases

cmos technology
low voltage
power consumption
power dissipation
low power
silicon on insulator

power management
power line
chip design
random access memory
power reduction
parallel processing

digital signal processing
energy efficiency
nm technology
low cost
mixed signal
ibm power processor

image sensor
energy saving
high speed
design considerations
reactive power