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Low power area optimized and high speed carry select adder using optimized half sum and carry generation unit for FIR filter.
R. Sakthivel
G. Ragunath
Published in:
J. Ambient Intell. Humaniz. Comput. (2021)
Keyphrases
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low power
high speed
power consumption
low cost
logic circuits
power dissipation
digital signal processing
real time
fir filters
finite impulse response
low power consumption
frame rate
cmos technology