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Survey of Techniques for Efficient Solving of Boolean Formulas from Formal Verification of Pipelined, Superscalar, and VLIW Microprocessors at a High Level of Abstraction.
Miroslav N. Velev
Published in:
ISAIM (2018)
Keyphrases
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high level
formal verification
bounded model checking
model checking
boolean formula
computer architecture
machine learning
instruction set
temporal logic
linear constraints