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A 43.9 μs IRS Controller SoC With Grid-Based Phase-Shift Optimization in 28 nm CMOS Technology for Next- Generation Communication.
Seungsik Moon
Youngjoo Lee
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2024)
Keyphrases
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cmos technology
low power
phase shift
power consumption
high speed
low cost
spl times
low voltage
parallel processing
power dissipation
digital signal processing
silicon on insulator
control system
mixed signal
hardware and software
input output
digital images
pattern recognition
video sequences