Resource-Efficient Parallel Tree-Based Join Architecture on FPGA.
Huan ZhangBei ZhaoWei-Jun LiZhen-Guo MaFeng YuPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2019)
Keyphrases
- parallel architecture
- pipelined architecture
- real time
- hardware design
- shared memory
- parallel architectures
- parallel programming
- parallel computers
- distributed processing
- management system
- systolic array
- software implementation
- computer architecture
- hardware implementation
- signal processing
- low cost
- field programmable gate array
- parallel execution
- multi processor
- fpga device
- resource allocation