Abstraction-Based Livelock/Deadlock Checking for Hardware Verification.
In-Ho MoonKevin HarerPublished in: DIFTS@FMCAD (2013)
Keyphrases
- hardware designs
- verification method
- low cost
- bounded model checking
- model checking
- temporal logic
- computing power
- real time
- data acquisition
- formal verification
- computational power
- hardware implementation
- computer systems
- high level
- image processing
- hardware and software
- hardware architecture
- software implementation
- data abstraction
- asynchronous circuits
- standard pc