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CCSDS 131.2-B-1 Serial Concatenated Convolutional Turbo Decoder Architecture for Efficient FPGA Implementation.

Miguel Ángel Pérez NaranjoVíctor P. Gil Jiménez
Published in: IEEE Access (2023)
Keyphrases
  • fpga implementation
  • hardware implementation
  • real time
  • image processing algorithms
  • computer vision
  • case study
  • data processing