A 7-bit 50ms/s single-ended asynchronous SAR ADC in 65nm CMOS.

Ye Xu Trond Ytterdal

Published in: NORCHIP (2013)

Keyphrases

analog to digital converter
delay insensitive
high speed
synthetic aperture radar
random access memory
image processing
multiscale
image reconstruction
power consumption
power supply
cmos technology
asynchronous communication
shift register