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Watid Phakphisut
ORCID
Publication Activity (10 Years)
Years Active: 2011-2023
Publications (10 Years): 5
Top Topics
Variable Size
Ldpc Codes
Flash Memory
Joint Source Channel Coding
Top Venues
ICT
IEEE Access
APSIPA
IET Commun.
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Publications
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Chatuporn Duangthong
,
Watid Phakphisut
,
Paramote Wardkein
Efficient Design of Read Voltages and LDPC Codes in NAND Flash Memory Using Density Evolution.
IEEE Access
11 (2023)
Sirawit Khittiwitchayakul
,
Watid Phakphisut
,
Pornchai Supnithi
Integer programming-based non-uniform window decoding schedules for spatially coupled low-density parity-check codes.
IET Commun.
16 (17) (2022)
Sirawit Khittiwitchayakul
,
Watid Phakphisut
Sliding-Window Turbo Equalization and Its Reduced-Complexity Decoding Techniques.
IEEE Access
10 (2022)
Chatuporn Duangthong
,
Watid Phakphisut
,
Pornchai Supnithi
Read Voltage Optimization in MLC NAND Flash Memory via the Density Evolution.
ICT
(2019)
Sirawit Khittiwitchayakul
,
Watid Phakphisut
,
Pornchai Supnithi
Sliding-Window Processing of Turbo Equalization for Partial Response Channels.
ICT
(2019)
Watid Phakphisut
,
Pornchai Supnithi
Decoding algorithm of LDPC codes for cascaded BSC-AWGN channels.
APSIPA
(2014)
Watid Phakphisut
,
Patanasak Prompakdee
,
Pornchai Supnithi
Design of Quasi-Cyclic LDPC Codes with Maximized Girth Property.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(11) (2013)
Watid Phakphisut
,
Pornchai Supnithi
Mixed-scheduling belief propagation for LDPC decoders in the magnetic recording systems.
ISITA
(2012)
Patanasak Prompakdee
,
Watid Phakphisut
,
Pornchai Supnithi
Quasi Cyclic-LDPC codes based on PEG algorithm with maximized girth property.
ISPACS
(2011)
Warangrat Wiriya
,
Watid Phakphisut
,
Pornchai Supnithi
LDPC decoder with modified LLR for bit patterned media with write errors.
ISPACS
(2011)
Pornchai Supnithi
,
Watid Phakphisut
,
Wicharn Singhaudom
Structured LDPC Codes to Reduce Pseudo Cycles for Turbo Equalization in Perpendicular Magnetic Recording.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(6) (2011)