Victor Luchangco

Publication Activity (10 Years)

Years Active: 1994-2022
Publications (10 Years): 10

Top Topics

Transactional Memory

Top Venues

Publications

Gal Milman-Sela, Alex Kogan, Yossi Lev, Victor Luchangco, Erez Petrank
BQ: A Lock-Free Queue with Batching. ACM Trans. Parallel Comput. 9 (1) (2022)
Victor Luchangco
Theory Meets Practice in the Algorand Blockchain (Invited Talk). OPODIS (2022)
Musab A. Alturki, Jing Chen, Victor Luchangco, Brandon M. Moore, Karl Palmskog, Lucas Peña, Grigore Rosu
Towards a Verified Model of the Algorand Consensus Protocol in Coq. FM Workshops (1) (2019)
Musab A. Alturki, Jing Chen, Victor Luchangco, Brandon M. Moore, Karl Palmskog, Lucas Peña, Grigore Rosu
Towards a Verified Model of the Algorand Consensus Protocol in Coq. CoRR (2019)
Victor Luchangco
Saying What You Mean. ApPLIED@PODC (2018)
Gal Milman, Alex Kogan, Yossi Lev, Victor Luchangco, Erez Petrank
BQ: A Lock-Free Queue with Batching. SPAA (2018)
Tingzhe Zhou, Victor Luchangco, Michael F. Spear
Hand-Over-Hand Transactions with Precise Memory Reclamation. SPAA (2017)
Tingzhe Zhou, Victor Luchangco, Michael F. Spear
Brief Announcement: Extending Transactional Memory with Atomic Deferral. SPAA (2017)
Tingzhe Zhou, Victor Luchangco, Michael F. Spear
Extending Transactional Memory with Atomic Deferral. OPODIS (2017)
Trevor Brown, Alex Kogan, Yossi Lev, Victor Luchangco
Investigating the Performance of Hardware Transactions on a Multi-Socket Machine. SPAA (2016)
Michael Wong, Eduard Ayguadé, Justin Gottschlich, Victor Luchangco, Bronis R. de Supinski, Barna L. Bihari
Towards Transactional Memory for OpenMP. IWOMP (2014)
Geppino Pucci, Victor Luchangco, Rajmohan Rajaraman
Foreword: Parallelism in Algorithms and Architectures. Theory Comput. Syst. 55 (3) (2014)
Irina Calciu, David Dice, Yossi Lev, Victor Luchangco, Virendra J. Marathe, Nir Shavit
NUMA-aware reader-writer locks. PPOPP (2013)
Tim Harris, Yossi Lev, Victor Luchangco, Virendra J. Marathe, Mark Moir
Constrained Data-Driven Parallelism. HotPar (2013)
Yujie Liu, Victor Luchangco, Michael F. Spear
Mindicators: A Scalable Approach to Quiescence. ICDCS (2013)
Dave Dice, Yossi Lev, Yujie Liu, Victor Luchangco, Mark Moir
Using hardware transactional memory to correct and simplify and readers-writer lock algorithm. PPOPP (2013)
Simon Doherty, Lindsay Groves, Victor Luchangco, Mark Moir
Towards formally specifying and verifying transactional memory. Formal Aspects Comput. 25 (5) (2013)
Jieung Kim, Sukyoung Ryu, Victor Luchangco, Guy L. Steele Jr.
Fine-Grained Function Visibility for Multiple Dispatch with Multiple Inheritance. APLAS (2013)
Mohsen Lesani, Victor Luchangco, Mark Moir
A Framework for Formally Verifying Software Transactional Memory Algorithms. CONCUR (2012)
Victor Luchangco, Virendra J. Marathe
Transaction communicators: enabling cooperation among concurrent transactions. PPOPP (2011)
Eric E. Allen, Justin Hilburn, Scott Kilpatrick, Victor Luchangco, Sukyoung Ryu, David Chase, Guy L. Steele Jr.
Type checking modular multiple dispatch with parametric polymorphism and multiple inheritance. OOPSLA (2011)
J. J. Hallett, Victor Luchangco, Sukyoung Ryu, Guy L. Steele Jr.
Integrating coercion with subtyping and multiple dispatch. Sci. Comput. Program. 75 (9) (2010)
Victor Luchangco, Virendra J. Marathe
You are not alone: breaking transaction isolation. IWMSE@ICSE (2010)
Srivatsan Ravi, Vincent Gramoli, Victor Luchangco
Transactional memory, linking theory and practice. SIGACT News 41 (4) (2010)
Yossi Lev, Victor Luchangco, Marek Olszewski
Scalable reader-writer locks. SPAA (2009)
Victor Luchangco, Mark Moir, Nir Shavit
-Compare-Single-Swap. Theory Comput. Syst. 44 (1) (2009)
Victor Luchangco
Against lock-based semantics for transactional memory. SPAA (2008)
Andrew Lutomirski, Victor Luchangco
Efficient Large Almost Wait-Free Single-Writer Multireader Atomic Registers. OPODIS (2008)
Maurice Herlihy, Victor Luchangco
Distributed computing and the multicore revolution. SIGACT News 39 (1) (2008)
J. J. Hallett, Victor Luchangco, Sukyoung Ryu, Guy L. Steele Jr.
Integrating coercion with subtyping and multiple dispatch. SAC (2008)
Eric E. Allen, J. J. Hallett, Victor Luchangco, Sukyoung Ryu, Guy L. Steele Jr.
Modular multiple dispatch with multiple inheritance. SAC (2007)
Maurice Herlihy, Yossi Lev, Victor Luchangco, Nir Shavit
A Simple Optimistic Skiplist Algorithm. SIROCCO (2007)
Steve Heller, Maurice Herlihy, Victor Luchangco, Mark Moir, William N. Scherer III, Nir Shavit
A Lazy Concurrent List-Based Set Algorithm. Parallel Process. Lett. 17 (4) (2007)
Faith Ellen, Yossi Lev, Victor Luchangco, Mark Moir
SNZI: scalable NonZero indicators. PODC (2007)
Victor Luchangco, Daniel Nussbaum, Nir Shavit
A Hierarchical CLH Queue Lock. Euro-Par (2006)
Peter Damron, Alexandra Fedorova, Yossi Lev, Victor Luchangco, Mark Moir, Daniel Nussbaum
Hybrid transactional memory. ASPLOS (2006)
Robert Colvin, Lindsay Groves, Victor Luchangco, Mark Moir
Formal Verification of a Lazy Concurrent List-Based Set Algorithm. CAV (2006)
Maurice Herlihy, Victor Luchangco, Mark Moir
A flexible framework for implementing software transactional memory. OOPSLA (2006)
Faith Ellen Fich, Victor Luchangco, Mark Moir, Nir Shavit
Obstruction-Free Step Complexity: Lock-Free DCAS as an Example. DISC (2005)
Maurice Herlihy, Victor Luchangco, Paul A. Martin, Mark Moir
Nonblocking memory management support for dynamic-sized data structures. ACM Trans. Comput. Syst. 23 (2) (2005)
Faith Ellen Fich, Victor Luchangco, Mark Moir, Nir Shavit
Obstruction-Free Algorithms Can Be Practically Wait-Free. DISC (2005)
Steve Heller, Maurice Herlihy, Victor Luchangco, Mark Moir, William N. Scherer III, Nir Shavit
A Lazy Concurrent List-Based Set Algorithm. OPODIS (2005)
Simon Doherty, Lindsay Groves, Victor Luchangco, Mark Moir
Formal Verification of a Practical Lock-Free Queue Algorithm. FORTE (2004)
Eric E. Allen, David Chase, Victor Luchangco, Jan-Willem Maessen, Guy L. Steele Jr.
Object-oriented units of measurement. OOPSLA (2004)
Simon Doherty, Maurice Herlihy, Victor Luchangco, Mark Moir
Bringing practical lock-free synchronization to 64-bit applications. PODC (2004)
Simon Doherty, David Detlefs, Lindsay Groves, Christine H. Flood, Victor Luchangco, Paul Alan Martin, Mark Moir, Nir Shavit, Guy L. Steele Jr.
DCAS is not a silver bullet for nonblocking algorithm design. SPAA (2004)
Maurice Herlihy, Victor Luchangco, Mark Moir, William N. Scherer III
Software transactional memory for dynamic-sized data structures. PODC (2003)
Victor Luchangco, Mark Moir, Nir Shavit
Nonblocking k-compare-single-swap. SPAA (2003)
Victor Luchangco, Mark Moir, Nir Shavit
On the Uncontended Complexity of Consensus. DISC (2003)
Maurice Herlihy, Victor Luchangco, Mark Moir
Obstruction-Free Synchronization: Double-Ended Queues as an Example. ICDCS (2003)
Maurice Herlihy, Victor Luchangco, Mark Moir
Space and Time Adaptive Non-blocking Algorithms. Electron. Notes Theor. Comput. Sci. 78 (2003)
Maurice Herlihy, Victor Luchangco, Mark Moir
The Repeat Offender Problem: A Mechanism for Supporting Dynamic-Sized, Lock-Free Data Structures. DISC (2002)
Maurice Herlihy, Victor Luchangco, Paul A. Martin, Mark Moir
Dynamic-sized lock-free data structures. PODC (2002)
Victor Luchangco
Modeling weakly consistent memories with locks. SPAA (2001)
Tadashi Araragi, Paul C. Attie, Idit Keidar, Kiyoshi Kogure, Victor Luchangco, Nancy A. Lynch, Ken Mano
On Formal Modeling of Agent Computations. FAABS (2000)
Alan D. Fekete, David Gupta, Victor Luchangco, Nancy A. Lynch, Alexander A. Shvartsman
Eventually-Serializable Data Services. Theor. Comput. Sci. 220 (1) (1999)
Matteo Frigo, Victor Luchangco
Computation-Centric Memory Models. SPAA (1998)
Victor Luchangco
Precedence-Based Memory Models. WDAG (1997)
Alan D. Fekete, David Gupta, Victor Luchangco, Nancy A. Lynch, Alexander A. Shvartsman
Eventually-Serializable Data Services. PODC (1996)
Tsvetomir P. Petrov, Anna Pogosyants, Stephen J. Garland, Victor Luchangco, Nancy A. Lynch
Computer-Assisted Verification of an Algorithm for Concurrent Timestamps. FORTE (1996)
Victor Luchangco, Ekrem Söylemez, Stephen J. Garland, Nancy A. Lynch
Verifying timing properties of concurrent algorithms. FORTE (1994)