Sureshchander

Publication Activity (10 Years)

Years Active: 1968-1978
Publications (10 Years): 0

Publications

Sureshchander
Comments on "Delayed Universal Logic Modules and Sequential Machine Synthesis". IEEE Trans. Computers 27 (2) (1978)
Sureshchander
Minimization of Switching Functions - A Fast Technique. IEEE Trans. Computers 24 (7) (1975)
Sureshchander
An Algorithm for Testing Asummability of Boolean Functions. IEEE Trans. Computers 23 (2) (1974)
Sureshchander, P. C. P. Bhatt
A Note on Q-Universal Logic Modules. IEEE Trans. Computers 23 (3) (1974)
Sureshchander, P. C. P. Bhatt
A New Representation of Sequential Machines for Determining All Incompatible Pairs. IEEE Trans. Computers 23 (3) (1974)
Sureshchander
Comments on "Decomposition Method of Determining Maximum Compatibles". IEEE Trans. Computers 22 (6) (1973)
Sureshchander
Comments on "The Synthesis of Binary Sequence Detectors". IEEE Trans. Computers 19 (2) (1970)
Sureshchander
RST Flip-Flop Input Equations. IEEE Trans. Computers 19 (11) (1970)
Sureshchander
Comments on "RST Flip-Flop Input Equations". IEEE Trans. Computers 17 (7) (1968)