Sudarsan V. S. Ranganathan

Publication Activity (10 Years)

Years Active: 2015-2019
Publications (10 Years): 16

Top Topics

Decoding Algorithm

Low Density Parity Check

Top Venues

IEEE Trans. Commun.

Publications

Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel
Quasi-Cyclic Protograph-Based Raptor-Like LDPC Codes for Short Block-Lengths. IEEE Trans. Inf. Theory 65 (6) (2019)
Nathan Wong, Ethan Liang, Haobo Wang, Sudarsan V. S. Ranganathan, Richard D. Wesel
Decoding Flash Memory with Progressive Reads and Independent vs. Joint Encoding of Bits in a Cell. GLOBECOM (2019)
Haobo Wang, Sudarsan V. S. Ranganathan, Richard D. Wesel
Variable-Length Coding With Shared Incremental Redundancy: Design Methods and Examples. IEEE Trans. Commun. 67 (9) (2019)
Sudarsan V. S. Ranganathan, Richard D. Wesel, Dariush Divsalar
Linear Rate-Compatible Codes with Degree-1 Extending Variable Nodes Under Iterative Decoding. ISIT (2018)
Hengjie Yang, Sudarsan V. S. Ranganathan, Richard D. Wesel
Serial List Viterbi Decoding with CRC: Managing Errors, Erasures, and Complexity. GLOBECOM (2018)
Haobo Wang, Sudarsan V. S. Ranganathan, Richard D. Wesel
Approaching capacity using incremental redundancy without feedback. ISIT (2017)
Nathan Wong, Kasra Vakilinia, Haobo Wang, Sudarsan V. S. Ranganathan, Richard D. Wesel
Sequential differential optimization of incremental redundancy transmission lengths: An example with tail-biting convolutional codes. ITA (2017)
Sudarsan V. S. Ranganathan, Tong Mu, Richard D. Wesel
Allocating Redundancy Between Erasure Coding and Channel Coding When Fading Channel Diversity Grows With Codeword Length. IEEE Trans. Commun. 65 (8) (2017)
Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel
Design of improved quasi-cyclic protograph-based Raptor-like LDPC codes for short block-lengths. ISIT (2017)
Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel
Design of Improved Quasi-Cyclic Protograph-Based Raptor-Like LDPC Codes for Short Block-Lengths. CoRR (2017)
Haobo Wang, Nathan Wong, Alexander M. Baldauf, Christopher K. Bachelor, Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel
An information density approach to analyzing and optimizing incremental redundancy with feedback. ISIT (2017)
Kasra Vakilinia, Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel
Optimizing Transmission Lengths for Limited Feedback With Nonbinary LDPC Examples. IEEE Trans. Commun. 64 (6) (2016)
Kasra Vakilinia, Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel
Optimizing Transmission Lengths for Limited Feedback with Non-Binary LDPC Examples. CoRR (2016)
Sudarsan V. S. Ranganathan, Tong Mu, Richard D. Wesel
Optimality and Rate-Compatibility for Erasure-Coded Packet Transmissions when Fading Channel Diversity Increases with Packet Length. CoRR (2016)
Sudarsan V. S. Ranganathan, Kasra Vakilinia, Dariush Divsalar, Richard D. Wesel
Universal rate-compatible LDPC code families for any increment ordering. ISTC (2016)
Sudarsan V. S. Ranganathan, Kasra Vakilinia, Lara Dolecek, Dariush Divsalar, Richard D. Wesel
Some results on spatially coupled protograph LDPC codes. ITA (2016)
Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel
On the girth of (3, L) quasi-cyclic LDPC codes based on complete protographs. ISIT (2015)
Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel
On the Girth of (3, L) Quasi-Cyclic LDPC Codes based on Complete Protographs. CoRR (2015)