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Sanjaya M. V
ORCID
Publication Activity (10 Years)
Years Active: 2020-2022
Publications (10 Years): 2
Top Topics
Gate Array
Vlsi Circuits
Signal Processor
Low Power
Top Venues
AIMLSystems
ISOCC
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Publications
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Sanjaya M. V
,
Madhav Rao
An hardware accelerator design of Mobile-Net model on FPGA.
AIMLSystems
(2022)
Karthik S
,
Karthick D
,
Sanjaya M. V
,
Madhav Rao
Design and Implementation of a Low Power Ternary Content Addressable Memory (TCAM).
ISOCC
(2020)