Qianneng Zhou

Publication Activity (10 Years)

Years Active: 2006-2022
Publications (10 Years): 4

Top Topics

Bargaining Solution

Principal Curves

Morphological Filtering

Top Venues

IEICE Electron. Express

J. Circuits Syst. Comput.

Publications

Yuanfa Wang, Qianneng Zhou, Jiasai Luo, Yi Lu, Huiqian Wang, Yu Pang, Zhiwei Huang
VLSI design of multiclass classification using sparse extreme learning machine for epilepsy and seizure detection. IEICE Electron. Express 19 (2) (2022)
Yuanfa Wang, Yu Pang, Huan Huang, Qianneng Zhou, Jiasai Luo
Hardware Design of Gaussian Kernel Function for Non-Linear SVM Classification. ASICON (2021)
Qianneng Zhou, Feihong Cheng, Hongjuan Li, Kai Yan, Wei Luo
High-order curvature-compensated CMOS bandgap voltage reference. ASICON (2017)
Tong Bai, Dan Li, Huiqian Wang, Yu Pang, Guoquan Li, Jinzhao Lin, Qianneng Zhou, Gwanggil Jeon
A PPG Signal De-Noising Method Based on the DTCWT and the Morphological Filtering. SITIS (2016)
Yu Pang, Yafeng Yan, Jinzhao Lin, Zhangyong Li, Qianneng Zhou, Wei Wu
Designing Optimized Imprecise Fixed-Point Arithmetic Circuits Specified by polynomials with Various Constraints. J. Circuits Syst. Comput. 23 (1) (2014)
Guoquan Li, Ke Tang, Jinzhao Lin, Yu Pang, Zhangyong Li, Qianneng Zhou, Lu Deng
Design of Modulation and Packet Detection in Body Area Networks. J. Comput. 9 (4) (2014)
Qianneng Zhou, Qi Li, Hongjuan Li, Jinzhao Lin, Yu Pang, Guoquan Li, Lu Deng
A Sub-1V High-PSRR Piecewise-Linear Bandgap Reference. J. Comput. 9 (5) (2014)
Qianneng Zhou, Fengchang Lai, Yongsheng Wang
On-Chip Voltage Down Converter Based on Moderate Inversion for Low- Power VLSI Chips. VLSI Design (2007)
Qianneng Zhou, Fengchang Lai, Mingyan Yu
On-chip 3.3V-to-1.8V voltage down converter for low-power VLSI chips. ACM Great Lakes Symposium on VLSI (2006)
Qianneng Zhou, Fengchang Lai, Mingyan Yu
Embedded DC-DC Voltage Down Converter for Low-Power VLSI Chip. APCCAS (2006)